Magnetic core counting circuit



April 8, 1969 A REGAL/4 3,438,014

MAGNETIC CORE COUNTING CIRCUIT Filed May 27, 1965 INVENTOR. A LBERTREGALADO ATTORNEY United States Patent Ofi ice 3,438,014 Patented Apr.8, 1969 US. Cl. 340-474 Claims ABSTRACT OF THE DISCLOSURE A magneticcore circuit including a first core and a second core coupled togetherby a coupling circuit. The first core can be set and reset and cangenerate output pulses of resultant opposite polarities in the couplingcircuit when it is set or reset. The circuit path includes twooppositely wound windings on the second core which generate currentswhich oppose and cancel each other whenever the output pulse has onepolarity. However, when the output pulse has the opposite polarity, onlyone of the two windings is operative and it permits the pulse to beapplied to and operate the second core.

This invention relates, in general, to magnetic storage devices and,particularly, to magnetic devices which are operable as counting devicesin a counting circuit.

Magnetic devices, or magnetic cores as they are known, which are usefulas counters have rectangular or square loop hysteresis curves. With sucha hysteresis curve, a magnetic core has a maximum positive fluxretentivity state, a positive remanent state, and a maximum negativeflux retentivity state, a negative remanent state. In addition, such acore can be energized in increments, and it can be stepped along itshysteresis curve from the maximum negative state to the maximum positivestate in steps, each of which represents a stable operating state. Thenumber of steps through which a core can be driven may be varied over awide range as desired. One circuit of this type is described in 'U.S.Patent No. 3,102,239 of Chen and Tracy.

The magnetic core counters described in the Chen-Tracy patent include atleast two square loop, magnetic cores, one called a quantizing core ordriving core for generating pulses of constant amplitude and durationand the other called a count core, coupled together by a unidirectionalcurrent transfer loop. In a counter which comprises many stagesincluding a first quantizing core and a plurality of count cores, eachcount core also operates as a quantizing or driving core for the nextadjacent count core, with a unidirectional current transfer loopprovided between each pair of cores. Each core, when it operates as aquantizing or driving core, applies pulses to the associated count core,and, after a certain number of pulses have been applied, the drivencount core switches, goes through a relatively large reverse fluxchange, and provides an output pulse.

The circuit loop which interconnects two cores must meet certainrequirements, and various circuit loop configurations have beendeveloped for interconnecting the several cores in a multi-stagemagnetic core counter. All of these loops are unidirectional transferloops and include means for preventing a counting core from beingaffected by spurious signals. In particular, they are aimed atpreventing one core from receiving spurious signals and changing statewhen an adjacent core experiences a reverse flux change. A problem canarise in these circuits when one core in the series is switched from onestate to another, since currents are generated which flow in the forwardloop to the next core and in the reverse loop to the preceding core. Thereverse current flow may affect the preceding core and provide aspurious change in state. This adverse effect is particularly likely tooccur when the preceding core is a counting core.

In the past, this problem has been solved to a certain extent by theprovision of a diode placed in parallel with the core windings in thetransfer loop between adjacent cores to bypass some of the disturbingcurrent. This solution is only partially effective. Another solutioncomprises the provision of a transistor in the transfer loop, with thetransistor being oriented so that it can only be turned on by the outputof the quantizing stage. This solution has been found to be moreeffective than the first; however, it is undesirably expensive and isnot completely effective, primarily because of the time required to turnoff the transistor once it has been turned on.

Accordingly, the objects of the present invention concern the provisionof an improved magnetic core counting circuit having novel means forpreventing currents generated by a counting core from adverselyaffecting any other core in the counter.

Other objects of the invention concern the provision of an improvedmagnetic core counting circuit which includes a counting core and adriving core for applying counting pulses thereto, the cores beingcoupled together by a curret flow loop including novel means forinsuring the proper transfer of pulses from one core to another.

The objects of the present invention also concern the provision of animproved magnetic core counting circuit which includes a plurality ofcore stages coupled together by circuit loops with means provided forpreventing the spurious energizing of one core when any other core isswitched or otherwise experiences a flux change.

Briefly, a circuit embodying the invention includes at least two cores,one operable as a quantizing or driving core and having an outputwinding, and the other operable as a counting core and having an inputwinding. The two cores have rectangular hysteresis loops, and saidoutput and input windings are interconnected by a unidirectional currentflow loop. For the most part, the cores and the coupling circuit betweenthem may be identical to the circuits described in the Chen-Tracypatent. However, according to the invention, in order to insure theproper transfer of signals from one core to another, an auxiliarywinding is provided in the current flow loop, and this auxiliary windingis so oriented with respect to the other windings that properinteraction of two adjacent cores is achieved.

The invention is described in greater detail by reference to the drawingwherein the single figure is a schematic representation of a magneticcore counting circuit embodying the invention.

In the following description of the invention, a dot convention is usedassociated with the core windings to denote the direction of winding ofthe various coils coupled to the cores. In this convention, current intothe dot end of a winding tends to establish one fiux polarity of a Core,and current out of a dot end tends to establish the opposite polarity.In addition, current into the dot end of one winding induces current outof the dot end of any other winding on the same core; thus the voltageinduced on the dot end will be opposite that on the associated non-dotend of any one winding.

Referring to the drawing, a magnetic counting circuit 10 embodying theinvention comprises, in series, a quan tizing magnetic core 20 and oneor more counting magnetic cores 120, 220, etc. For purposes ofillustration, two counting cores and 220 are shown. Each of the magneticcores 20, 120, and 220 has a substantially rectangular hysteresis loopand, therefore, has a plurality of stable operating states of magneticremanence.

The quantizing core 20 has three windings 34, 36, and

38 coupled thereto, with winding 34 being an input winding coupled to asource 44 of input or set pulses for switching the core from its maximumnegative remanent state to it maximum positive remanent state. Winding36 is a reset winding and is coupled to a source 50 of reset pulseswhich serve to reset or switch the core from the aforementioned positiveremanant state to the negative remanant state. Winding 38 is an outputwinding in which pulses are generated each time the core 20 is set andreset. However, the circuit loop 54 associated with the output winding38 is designed to utilize only the output pulse generated by resettingof the core 20, as will be described below.

The counting core 120 similarly includes an input winding 134, a resetwinding 136, and an output winding 138. The reset winding 136 is coupledto a source 151} of pulses for resetting the core from its positiveremanent state to its negative remanent state. The input winding 134 iscoupled through a circuit loop to the output winding 38 of thequantizing core 20. The input winding 134 of the counting core 120 iswound oppositely to the output winding of the core 20, and the non-dotend of the output winding 38 of the core 20 is directly connected to thedot end of the input Winding 134 of core 120. The non-dot end of theinput winding of the core 120 is connected through a resistive path 58to the dot end of the output winding 38 of core 20. In addition,according to the invention, an auxiliary winding 60 is provided oncounting core 120. The auxiliary winding 60 is wound oppositely to theinpu winding 134 on the core 120 and is thus 180 out of phase therewith.The non-dot end of the auxiliary winding 60 is connected to the non-dotend of the output winding 33 of the core 20 and to the dot end of theinput winding 134 of core 120. The dot end of the auxiliary winding 60is connected through a unidirectional current flow device, for example,a diode 66 oriented as shown, to the dot end of the output winding ofcore 20.

Core 220, like core 120, includes an input or set winding 234, a resetwinding 236, and an output winding 238. A source 250 of reset pulses iscoupled to reset winding 236, and a coupling loop 154, identical to loop54, is coupled between output winding 138 of core 120 and input winding234 of core 220. The loop 154 includes auxiliary winding 16!) and diode166 and, in addition, resistive path 158 which couples winding 234 toWinding 138. If the counting circuit includes additional cores, thensimilar coupling circuits would be provided.

In operation of the counting circuit 10, initially, all of the cores arein the maximum negative remanent state. Input or set pulses are appliedto core by source 54), and each time that the quantizing core 20 is setto its maximum positive remanent state by a pulse from source 44, anoutput pulse is generated in the output winding 33 and output currentflows out of the non-dot end of the output winding. This current dividesand flows through the auxiliary winding 60 and through the input winding134 of core 120. Since the windings 60 and 134 are 180 out of phase witheach other, the currents oppose and cancel each other, and core 120 isnot affected. It is clear, of course, that the windings have thenecessary number of turns and that their paths have the proper Overallresistances to achieve the desired cancellation. However, when a resetpulse is applied to quantizing core 20 from source 50 to drive it to itsmaximum negative remanent state, current flows out of the dot end ofout-put Winding 38 and is blocked from entering the auxiliary winding 60by the diode 66, but it flows through the resistive path 58 and throughthe input winding 134 of core and energizes the core 120 by anincremental amount as described in the above-identified patent. Thus,each time that the core 20 is reset, the care 124 is energized by anincremental amount until it reaches its state of maximum positiveremanence. At this time, the core 120 is reset by a pulse from source150, and an output pulse energizes core 220 incrementally in the sameWay that an output pulse from core 20 energizes core 120.

According to the invention as described above, when core 126 is resetand generates an output pulse, it also tends to generate a current pulsein its input winding 134 which might adversely affect the core 20 if theauxiliary winding were not present. However, an equal and oppositecurrent is generated in the circuit path including the auxiliary winding60, and these two feedback currents cancel each other, and core 20 isnot adversely aifected. The auxiliary winding 169 performs the sameaction in circuit loop 154 as it does in loop 54 so that core 120 isprotected when core 226 is reset.

What is claimed is:

1. A magnetic core circuit including a first magnetic switching core anda second magnetic switching core,

a circuit path coupling said first core to said second core,

an output winding on said first core and in said circuit path forgenerating a first output pulse of one polarity or a second output pulseof the opposite polarity, the polarity being determined by input pulsesapplied thereto,

said circuit path including two circuit loops connected in parallel andeach including said output winding on said first core,

said loops being arranged so that currents which are induced in each atthe same time in response to said first output pulse flow in oppositedirections and cancel each other and thus do not electrically affectsaid second core,

said loops also having auxiliary circuit means such that current flow insaid circuit path in response to said second output pulse appears onlyin one of said loops and can electrically afiect said second core.

2. The circuit defined in claim 1 wherein said auxiliary circuit meansincludes a unidirectional current flow element in one of said loops.

3. The circuit defined in claim 1 wherein said auxiliary circuit meansincludes a diode in one of said loops.

4. The circuit defined in claim 1 wherein each of said parallel circuitloops includes a separate winding on said second core, said windingsbeing oppositely wound to generate said opposite currents.

5. The circuit defined in claim 1 wherein each of said parallel circuitloops includes a separate winding on said second core, said separatewindings being oppositely wound to generate said opposite currents, saidparallel paths also being arranged so said opposite currents are alsosubstantially equal.

6. A magnetic core circuit including a first magnetic core and a secondmagnetic core,

input, output, and reset windings on said first core,

input, output, and reset windings on said second core,

a circut path coupling said output winding on said first core to saidinput winding on said second core,

said circuit path including two circuit loops coupled in parallel andeach including said output winding on said first core, said loops beingarranged so that currents which are induced in each at the same timeflow in opposite directions and cancel each other and thus do not afiectsaid output winding and said first core.

7. A magnetic core circuit including a first magnetic core and a secondmagnetic core,

input, output, and reset windings on said first core,

input, output, and reset windings on said second core,

a circuit path coupling said output winding on said first core to saidsecond core,

said circuit path including two circuit loops coupled in parallel, onloop including said output winding on said first core and said inputwinding on said second core, and the other loop including said outputwinding on said first core and an auxiliary Winding on said second coreand a unidirectional current flow device, said loops being arranged sothat currents which are induced in each at the same time flow in 5 6opposite directions and cancel each other and thus said input and outputwindings on said first core and do not affect said output winding andsaid first core. said auxiliary winding being wound in the same di- 8.The circuit defined in claim 7 wherein said auxiliary rection so that anoutput pulse generated by said winding and said input winding on saidsecond core are first core, in response to a signal applied to saidinput wound in opposite directions. winding, flows into said oppositelyWound auxiliary 9. The circuit defined in claim 7 wherein said auxiliary5 winding and input winding on said second core and winding and saidinput winding on said second core are therefore has no effect on saidsecond core. Wound in opposite directions,

said unidirectional current flow device comprising a di- ReferencesCited iJdC oriinted to bltock lcurrent flclxwdtlzrouglcl1 iitis circuit10 UNITED STATES PATENTS 00p w en a rese pu se is app 1e 0 san rs coreand an output pulse appears in the output winding of ggii 01 2 Thompson340 174 said first core, said output pulse appearing in said 1 Woo 34O174 input windin of said second core. 4 10. The circuit defined in claim7 wherein said aux- 15 BERNARD KONICKPHma'y iliary winding and saidinput Winding on said second core GARY M. HOFFMAN, Assistant Examiner.are wound in opposite directions,

